发明名称 PLL CONTROL CIRCUIT AND METHOD OF CONTROLLING THE SAME
摘要 A PLL(Phase Locked Loop) controlling circuit and a method for the same are provided to output the optimum coefficient regardless of the type of video signal by detecting the state of an error according to phase error between a horizontal sync signal of an input video signal and a reference signal and changing a coefficient corresponding to the detected state. A PLL controlling circuit(10) is composed of an error amount detecting circuit(12) and a coefficient switching part(14). The PLL controlling circuit receives a phase error between a horizontal sync signal of a video signal and a reference signal. The error amount detecting circuit determines a critical value of the phase error using the N thresholds to output a control signal(104) indicating one of N+1 levels. The coefficient switching part outputs one of the N+1 gains as a coefficient signal, wherein the outputted gain corresponds to the level indicated by the control signal.
申请公布号 KR20060125462(A) 申请公布日期 2006.12.06
申请号 KR20060007292 申请日期 2006.01.24
申请人 OKI ELECTRIC INDUSTRY CO., LTD. 发明人 SATOH YASUNORI;AKIYAMA TAKAAKI
分类号 H04N5/04 主分类号 H04N5/04
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