发明名称 Integration flow to prevent delamination from copper
摘要 The present invention provides, in one embodiment, method of forming a barrier layer 300 over a semiconductor substrate 110. The method comprises forming an opening 120 in an insulating layer 130 located over a substrate thereby uncovering an underlying copper layer 140. The method further comprises exposing the opening and the underlying copper layer to a plasma-free reducing atmosphere 200 in the presence of a thermal anneal. The also comprises depositing a barrier layer in the exposed opening and on the exposed underlying copper layer. Such methods and resulting conductive structures thereof may be advantageously used in methods to manufacture integrated circuits comprising copper interconnects.
申请公布号 US7144808(B1) 申请公布日期 2006.12.05
申请号 US20050151154 申请日期 2005.06.13
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 AGGARWAL SANJEEV;TAYLOR KELLY J.
分类号 H01L21/44;H01L21/4763 主分类号 H01L21/44
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