| 摘要 |
A clock for a computing system. The clock includes a first pulse shaver and a first pin connected to the first pulse shaver. The first pin selectively enables the first pulse shaver to reduce the width of enabling pulses in a clock signal passing through the first pulse shaver. A method for synchronizing data flow in a computing system. The method includes generating pulses; selectively reducing the width of the pulses; and delivering the pulses to a memory element.
|
