| 摘要 |
A non-volatile memory device having increased charging capacitance is provided to minimize the generation of hole current and reduce a leakage current by disposing a phosphorous-doped alumina layer between a floating gate electrode and an ONO layer. A tunnel oxide layer(210) is disposed on a semiconductor substrate(200). A floating gate electrode(220) is disposed on the tunnel oxide layer. An alumina layer(230) is disposed on the floating gate electrode. An ONO layer(240) in which a lower oxide layer, a nitride layer and an upper oxide layer are sequentially disposed is formed on the alumina layer. A control gate electrode(250) is disposed on the ONO layer. The floating gate electrode can be a polysilicon layer doped with impurity ions. The alumina layer can be a phosphorous-doped alumina layer.
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