发明名称 DELAY CIRCUIT
摘要 <p>A delay circuit is provided to set an accurate timing among LSIs(Large-Scale Integrated circuits) with different timing settings, which operate at a high speed, by adjusting a sum delay time of a second delay device and an adjustment device. In a delay circuit, a first delay device controls a delay time according to the propagation of a signal by a delay time control signal, and a second delay device receives the delay time control signal from a frequency variable oscillator including a phase inversion device for inverting the phase of the signal. An adjustment device is connected to the second delay device in series and propagates the signal. The sum delay time of the second delay device and the adjustment device is adjusted.</p>
申请公布号 KR100655814(B1) 申请公布日期 2006.12.04
申请号 KR20050111289 申请日期 2005.11.21
申请人 FUJITSU LIMITED 发明人 NOMURA KENICHI
分类号 G11C11/407;G11C8/00;H03K5/13 主分类号 G11C11/407
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