| 摘要 |
A method for manufacturing a semiconductor device is provided to reduce parasitic series resistance and to restrain short channel effect by embedding full depletion transistor using an epi-silicon growth and an SOI substrate. An SOI substrate including a silicon substrate(31), a buried oxide layer(32) and a silicon layer(33) is prepared. A gate(40) having a hard mask nitride layer(38) is formed on the SOI substrate. An oxide spacer(41) and a nitride spacer(42) are sequentially formed at both sidewalls of the gate. The silicon layer and the buried oxide layer are etched. A polysilicon spacer(43) is formed at sidewalls of the nitride spacer. An epi-silicon layer is grown on the buried oxide layer of the both sides of the gate. A source/drain region(45) is then formed by implanting impurities into the epi-silicon layer.
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