发明名称 |
Open digit line array architecture for a memory array |
摘要 |
A system and method for sensing a data state stored by a memory cell that includes coupling a first digit line and a second digit line to a precharge voltage and further coupling a memory cell to the first digit line. At least one digit line other than the first and second digit lines is driven to a reference voltage level and the at least one digit line is coupled to the second digit line to establish a reference voltage in the second digit line. A voltage differential is sensed between the first digit line and the second digit line, and a data state based on the voltage differential is latched in response.
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申请公布号 |
US2006268639(A1) |
申请公布日期 |
2006.11.30 |
申请号 |
US20060501143 |
申请日期 |
2006.08.07 |
申请人 |
YOON SEI S;INGALLS CHARLES L;PINNEY DAVID;KIRSCH HOWARD C |
发明人 |
YOON SEI S.;INGALLS CHARLES L.;PINNEY DAVID;KIRSCH HOWARD C. |
分类号 |
G11C7/00 |
主分类号 |
G11C7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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