| 摘要 |
PROBLEM TO BE SOLVED: To materialize a countermeasure against a reversal region in a CMOS semiconductor device, without changing the manufacturing process of a CMOS semiconductor device. SOLUTION: A boundary region 40 is constituted such that a first layer oxide film 208, a polysilicon film 210-2a, and a third layer oxide film 214 are overlapped on a portion of a boundary 5 of a p-type well 203 and an n-type well 202, and aluminum wiring 216A extending from the n-type well 202 is formed in the upper surface of this third layer oxide film 214. Estrange distance from a p-type well 203 and the n-type well 202 to the aluminum wiring 8 is distance L2 which is longer than the conventional estrange distance L1. The polysilicon film 210-2a is the portion left behind without removing a polysilicon film 210-1 formed so as to form a gate. COPYRIGHT: (C)2007,JPO&INPIT
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