发明名称 Image display unit
摘要 A motion vector detection circuit detects a motion vector from a video signal and a one-frame delayed video signal. An interpolation video signal generation circuit uses this detected motion vector to generate an interpolation video signal which is interpolated between frames. Further, two time base emphasizing circuits respectively use a video signal of a preceding frame to perform time base emphasis with respect to the video signal and the generated interpolation video signal. The video signal and the interpolation video signal subjected to time base emphasis are written in a time-series conversion memory. Furthermore, alternately reading the interpolation video signal and the video signal in the mentioned order with a frequency which is double a write frequency can obtain an output video signal having a doubled frame frequency.
申请公布号 US2006267904(A1) 申请公布日期 2006.11.30
申请号 US20060442215 申请日期 2006.05.30
申请人 VICTOR COMPANY OF JAPAN, LIMITED 发明人 AIBA HIDEKI
分类号 G09G3/36 主分类号 G09G3/36
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