| 摘要 |
A buffer system includes a logic adjusting circuit for translating a first logic level of a first component to a second logic level of a second component. The first and second logic level values are substantially different, and the buffer system has no directional control signal. A method of interfacing at least two components with different logic voltage requirements on a single bus without a separate directional control signal includes initializing a buffering circuit, activating the buffering circuit, transferring data through the buffering circuit, and deactivating the buffering circuit. A method of implementing a bidirectional interface between at least two devices interfaced on a bus includes providing a plurality of logic components interconnected to transfer data through the bus, and transferring data through the bus from a first device to a second device. The direction of data transfer is determined without a separate directional control signal.
|
