| 摘要 |
A method and a system for reducing the simultaneous switching output noise in integrated circuit chips. The method includes sending a previous bit pattern and a current bit pattern consecutively on the data bus, wherein the previous bit pattern transitions to the current bit pattern and the number of bits that transition is greater than half the number of bits in the data bus; flipping the current bit pattern to obtain an intermediate bit pattern; sending the intermediate bit pattern; receiving the intermediate bit pattern; and flipping the received intermediate bit pattern, to retrieve the current bit pattern.
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