| 摘要 |
A CTC(Convolutional Turbo Code) interleaver is provided to make the output of a CTC interleaving read address generator simply become a value increased in order, so as to simultaneously transmit many data in the next stage, thereby overcoming a data bottleneck during CTC interleaving. A bit pair exchange(100) exchanges bit pairs of even-numbered input data bits. An interleaving write address generator(110) generates an interleaving write address. A CTC interleaver memory(120) stores CTC interleaving-processed data. A read address generator(130) delivers data for CTC encoding.
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