| 摘要 |
A power supply apparatus of a low power consumption capable of supplying a sufficient current in a case of a heavy load and performing a high-speed transient response in a case of a variation of a load. The power supply apparatus (1) comprises NMOS output transistors (11,12) located between an input power supply (VTT_IN) and a ground potential for supplying a power to an output terminal (VTT output terminal); a reference voltage generator circuit (6) for generating a reference voltage (VREF); and differential amplifier circuits (13,14) for comparing an output power supply voltage (VTT) fed back thereto with the reference voltage (VREF) to control the respective NMOS output transistors (11,12). The differential amplifier circuits (13,14) provides an input offset voltage between the reference voltage (VREF) supplied thereto and the output power supply voltage (VTT) so as to cause the output power supply voltage (VTT) to include a voltage range where the NMOS output transistors (11,12) both are in off states.
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