发明名称 |
Data storage system |
摘要 |
A system interface having a cache memory and a plurality of directors. Each one of the plurality of directors includes a data pipe coupled between an input of such one of the directors. The data pipe includes a data pipe memory and a data pipe memory controller for controlling the data pipe memory. Each one of the directors includes microprocessor coupled to the data pipe memory controller. The system includes a switching network coupled to the cache memory to transfer data between the memory and: (a) the input of a selected one of the plurality of directors through the data pipe memory; (b) the microprocessor and the data pipe memory through the data pipe memory controller of a selected one of the plurality of directors; and (c) the microprocessor and the data pipe memory controller while by-passing the data pipe memory of a selected one of the plurality of directors.
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申请公布号 |
US7143306(B2) |
申请公布日期 |
2006.11.28 |
申请号 |
US20030403262 |
申请日期 |
2003.03.31 |
申请人 |
EMC CORPORATION |
发明人 |
PORAT OFER;CAMPBELL BRIAN K.;XU JANE;BRUNO ERIC J.;WILSON PAUL C. |
分类号 |
G06F11/00;G06F11/20;G06F12/08;G06F13/12;G06F13/40 |
主分类号 |
G06F11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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