发明名称 |
Method of fabricating nano-scale resistance cross-point memory array |
摘要 |
A method of fabricating a nano-scale resistance cross-point memory array includes preparing a silicon substrate; depositing silicon oxide on the substrate to a predetermined thickness; forming a nano-scale trench in the silicon oxide; depositing a first connection line in the trench; depositing a memory resistor layer in the trench on the first connection line; depositing a second connection line in the trench on the memory resistor layer; and completing the memory array. A cross-point memory array includes a silicon substrate; a first connection line formed on the substrate; a colossal magnetoresistive layer formed on the first connection line; a silicon nitride layer formed on a portion of the colossal magnetoresistive layer; and a second connection line formed adjacent the silicon nitride layer and on the colossal magnetoresistive layer.
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申请公布号 |
US7141481(B2) |
申请公布日期 |
2006.11.28 |
申请号 |
US20040909218 |
申请日期 |
2004.07.29 |
申请人 |
SHARP LABORATORIES OF AMERICA, INC. |
发明人 |
HSU SHENG TENG;ZHUANG WEI-WEI;PAN WEI;ZHANG FENGYAN |
分类号 |
H01L21/20;H01L27/105;G11C13/00;H01L21/8246;H01L27/115;H01L27/24;H01L43/08 |
主分类号 |
H01L21/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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