发明名称 System and method for automatic masking of compressed scan chains with unbalanced lengths
摘要 A scan test architecture is implemented. The scan test architecture provides a method of performing scan test of unbalanced scan chains. The scan test architecture generates a control signal (i.e., masking signal) to mask bits in an unbalanced scan chain. In one embodiment, the control signal is generated with a logic gate, a comparator, and a counter.
申请公布号 US7143324(B2) 申请公布日期 2006.11.28
申请号 US20040980961 申请日期 2004.11.04
申请人 AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD. 发明人 BRATT JOHN T.;REARICK JEFFREY R.
分类号 G01R31/28 主分类号 G01R31/28
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