发明名称 FREQUENCY-DIVIDING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a frequency-dividing circuit for stably generating a pulse signal for generating a sawtooth wave signal having a frequency of one third of the frequency of an input signal. SOLUTION: A T-flip-flop 21 inverts an output state in synchronization with the rising edge of a pulse signal B generated by an oscillator 10. A T-flip-flop 22 inverts an output state in synchronization with the rising edge of a logical signal C outputted from a Q_terminal of the T-flip-flop 21. An OR circuit 26 outputs the OR of the logical signal C and the logical signal D outputted from the Q_terminal of the T-flip-flop 22. A delay circuit 27 generates a delay signal E by delaying the rising edge of an output signal of the OR circuit 26. An AND circuit 28 resets the T-flip-flop 21 by utilizing the delay signal E. The pulse signal obtained by inverting the logic of the delay signal E is given to a sawtooth wave generation circuit 30. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006319446(A) 申请公布日期 2006.11.24
申请号 JP20050137556 申请日期 2005.05.10
申请人 TOYOTA INDUSTRIES CORP 发明人 OGAWA SHINGO
分类号 H03K23/64;H03K4/08 主分类号 H03K23/64
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