发明名称 E-SiGe AMALGAMATING SOI BOTTOM PREDOPING FOR DECREASING HEIGHT OF POLYSILICON
摘要 PROBLEM TO BE SOLVED: To provide a forming method of a semiconductor device that decreases the penetration of boron into a channel, and that forms a source/drain region with up to an embedded oxide layer completely doped, and simultaneously applies compressive stress to the channel in doping the source/drain region and a gate electrode. SOLUTION: The gate electrode 302 is formed in a silicon layer 301 on the embedded oxide layer to form a recess 305 on a silicon surface that sandwiches the gate electrode 302. Then, predoping is performed on the recess 305, and a SiGe layer 401 is further formed in the recess by epitaxial deposition. Low energy doping is performed on the source/drain region and the gate electrode 302 after an extension is formed. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006319326(A) 申请公布日期 2006.11.24
申请号 JP20060114623 申请日期 2006.04.18
申请人 TOSHIBA CORP 发明人 KOYAMA HIROSUKE
分类号 H01L29/786;H01L21/336;H01L21/8238;H01L27/08;H01L27/092 主分类号 H01L29/786
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