发明名称 METHOD OF MANUFACTURING MULTI-LEVEL CONTACTS BY SIZING OF CONTACT SIZES IN INTEGRATED CIRCUITS
摘要 A method [600] for forming an integrated circuit includes etching a first opening [228] [338] [402] to a first depth in a dielectric material [322] over a semiconductor device [317] on a first semiconductor substrate [202] and etching a second opening [230] [340] [404] to a second depth in the dielectric material [322] over the first semiconductor substrate [202]. The first and second openings [228] [338] [402] [230] [340] [404] are differently sized to respectively etch to the first and second depths in about the same time due to etch lag. The first and second openings [228] [338] [402] [230] [340] [404] are filled with conductive material.
申请公布号 KR20060119856(A) 申请公布日期 2006.11.24
申请号 KR20067000079 申请日期 2003.12.30
申请人 ADVANCED MICRO DEVICES, INC. 发明人 HELLIG KAY;AMNIPUR MASSUD
分类号 H01L21/768;G11C8/08;H01L23/522 主分类号 H01L21/768
代理机构 代理人
主权项
地址