发明名称 |
Transistor producing method for logic and memory application, involves removing sacrificial layer over channel region under gate electrode, and applying high-k-gate-dielectric layer over channel region under gate electrode |
摘要 |
<p>The method involves selectively applying a sacrificial layer (4) e.g. silicon germanium layer, on a semiconductor substrate at a channel region. A gate electrode is formed over the sacrificial layer, and a source electrode and a drain electrode are formed in the substrate on both sides of the region. The sacrificial layer over the region under the gate electrode is removed, and a high-k-gate-dielectric layer is applied over the region.</p> |
申请公布号 |
DE102005016925(A1) |
申请公布日期 |
2006.11.23 |
申请号 |
DE20051016925 |
申请日期 |
2005.04.13 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
SEIDL, HARALD;GUTSCHE, MARTIN ULRICH |
分类号 |
H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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