| 摘要 |
Memory bank selection control circuits and methods are provided which improve the data sensing margin for data sense amplifiers in a multi-bank semiconductor memory structure. In one aspect, a bank selection signal control circuit includes a bank switch control unit that receives memory bank selection signals and outputs corresponding memory bank selection control signals to selectively connect memory banks to a global data input/output line according to a predetermined sequence. For memory bank selected prior to a last selected memory bank in the predetermined sequence, the bank switch control unit outputs memory bank selection control signals that are enabled for a first time period P 1 , and for the last selected memory bank, the bank switch control unit outputs a memory bank selection control signal that is enabled for a second time period P 2 , wherein P 2 is greater than P 1 . A switching unit sequentially connects each selected memory bank to the global data input/output line according to the predetermined sequence, and for a predetermined period P 1 or P 2 , in response to the corresponding bank selection control signals.
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