发明名称 Shared memory multiprocessor system
摘要 In a shared memory multiprocessor system, data reading accesses and data write-back completion notifications are selected in synchronism with all of the nodes to order them. In each of the nodes, a subject address of ordered data reading access is compared with a subject address of ordered data write-back completion notification to detect a data reading operation of the same address which is passed by the completion of the data writing-back operation. Both a data reading sequence and a data writing-back sequence are determined. At this time, such a coherency response for prompting a re-reading operation of the data is transmitted to the node which transmitted the data reading access, so that coherency of the data is maintained.
申请公布号 US2006265466(A1) 申请公布日期 2006.11.23
申请号 US20060434742 申请日期 2006.05.17
申请人 YASUI TAKASHI;FUJIWARA SHISEI;MURATA NORIHIKO 发明人 YASUI TAKASHI;FUJIWARA SHISEI;MURATA NORIHIKO
分类号 G06F15/167 主分类号 G06F15/167
代理机构 代理人
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