发明名称 DYNAMIC CLOCK CONTROL CIRCUIT AND METHOD
摘要 <p>A variable clock control information generator receives graphics engine activity data relating to the operating level of a graphics engine, and memory activity data relating to an activity level of memory. In response, the variable clock control information generator produces graphics engine clock control information and memory clock control information with respect to each other, such that a relative difference between the graphics engine activity data and the memory activity data is within balance threshold data. Accordingly, the variable clock control information generator adapts to the varying levels of graphics engine activity and memory activity and adjusts the frequency of the graphics engine clock signal and the frequency of the memory clock signal to achieve a balanced relative activity level.</p>
申请公布号 EP1723491(A2) 申请公布日期 2006.11.22
申请号 EP20050708674 申请日期 2005.03.02
申请人 ATI TECHNOLOGIES INC. 发明人 KHODORKOVSKY, OLEKSANDR
分类号 G06F1/32;G06F1/04;G09G5/18 主分类号 G06F1/32
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