发明名称 |
Low power sigma delta modulator |
摘要 |
A low power analog-to-digital channel includes a decimation filter coupled to a sigma-delta modulator. Various embodiments include a decimation filter including an output and a sigma-delta modulator coupled to the output of the decimation filter, where a clock frequency applied to the decimation filter is approximately an integral multiple of a sampling frequency of the sigma delta modulator. In an embodiment, the sigma-delta modulator includes one or more successive approximation converters. In an embodiment, the sigma delta modulator includes one or more area efficient integrators.
|
申请公布号 |
EP1724930(A2) |
申请公布日期 |
2006.11.22 |
申请号 |
EP20060252616 |
申请日期 |
2006.05.19 |
申请人 |
STARKEY LABORATORIES, INC. |
发明人 |
FAROOQI, NEAZ;WAHL, JERRY;RICHARDSON, GARRY |
分类号 |
H03M3/04 |
主分类号 |
H03M3/04 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|