发明名称 Copper interposer for reducing warping of integrated circuit packages and method of making IC packages
摘要 A stacked die integrated circuit assembly comprising: 1) a substrate; 2) a first integrated circuit die mounted on the substrate; 3) a copper interposer mounted on the first integrated circuit die; and 4) a second integrated circuit die mounted on the copper interposer. The copper interposer significantly reduces the warping of the stacked die IC assembly caused by the warping of the substrate due to thermal changes in the substrate. The copper interposer has a significantly higher coefficient of thermal expansion than a conventional silicon (Si) interposer. The higher CTE enables the copper interposer to counteract the substrate warping.
申请公布号 EP1643553(A3) 申请公布日期 2006.11.22
申请号 EP20050255975 申请日期 2005.09.26
申请人 STMICROELECTRONICS, INC. 发明人 CHIU, ANTHONY M.;TEE, TONG YAN
分类号 H01L25/065 主分类号 H01L25/065
代理机构 代理人
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