摘要 |
The present invention discloses an IDE control device suitable for any clock frequency specification. The circuit configuration of the device comprises: a phase-locked loop for receiving clock signals generated from a clock generator and thereby generating a plurality of requested clock signals; and an IDE controller, comprising: a selection module for selecting suitable clock signals and switching active hard discs, and an interface module for generating signals to be transmitted; wherein the selection module is connected to the phase-locked loop and selects clock signals suitable for various hard discs, and then the interface module generates corresponding signals to be transmitted through an IDE bus to access a corresponding hard disc.
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