发明名称 Semiconductor memory
摘要 In the non-volatile semiconductor memory in which an N-type source diffusion layer and an N-type drain diffusion layer are formed on a P-type well formed on a substrate: the source diffusion layer has a protrusion portion and a depressed portion on a cross section taken along a plane that includes (a) a straight line extending along a direction of extension of the source diffusion layer and (b) a normal line of the semiconductor substrate, and the source diffusion layer is formed of a series of (a) an upper-wall layer constituting the protrusion portion, (b) a lower-wall layer constituting the depressed portion, and (c) a side-wall layer between the upper-wall layer and the lower-wall layer; a silicide is formed to cover the upper-wall layer, the lower-wall layer, and the side-wall layer, and an insulating layer is formed to cover the silicide; and a distance d between (a) an interface between the insulating layer and the silicide formed on the upper-wall layer and (b) an interface between the insulating layer and the silicide formed on the lower-wall layer is 1000 Å or shorter. This structure allows (i) miniaturization of the non-volatile semiconductor memory and (ii) reduction in a resistance of the source diffusion layer of the non-volatile semiconductor memory.
申请公布号 US2006258108(A1) 申请公布日期 2006.11.16
申请号 US20060418112 申请日期 2006.05.05
申请人 SHARP KABUSHIKI KAISHA 发明人 HIRONAKA KATSUYA;SATO SHINICHI
分类号 H01L29/80;H01L21/336 主分类号 H01L29/80
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