| 摘要 |
Control logic monitors use of a particular functional element (e.g., a divider, or multiplier or the like) in a programmable processor, and the control logic powers the unit down when it has not been used for a specified time period. A counter (local or central) and time threshold determine when the period has elapsed without use of the element. The control logic also monitors how soon the functional unit is woken up again, to determine if power control is causing thrashing. Upon the determination of such thrashing, the unit automatically adjusts its threshold period, to minimize thrashing. In an example of the logic, when it determines that it is being too conservative, it lowers the threshold. Mode bits may allow the programmer to override the power-down logic to either keep the logic always powered-up, or always powered-down.
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