发明名称 METHOD OF FORMING METAL INTERCONNECT FOR SEMICONDUCTOR DEVICE BASED ON SELECTIVE DAMASCENE PROCESS
摘要 Provided is a method for forming metal interconnect only in desired regions of a semiconductor device based on selective damascene using an insulation material against plating to form the metal interconnect without a Chemical Mechanical Polishing (CMP) or an additional lithography process. The selective damascene is stable and effective in the respect of cost and simplifies the semiconductor interconnect forming process.
申请公布号 US2006258144(A1) 申请公布日期 2006.11.16
申请号 US20060382175 申请日期 2006.05.08
申请人 发明人 CHOI TAE-HOON;LEE HYUNG S.;CHANG SUNG-IL;YOON JUN-BO
分类号 H01L21/4763 主分类号 H01L21/4763
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