发明名称 Logic and memory device integration
摘要 Memory devices are adapted for direct interface or virtual integration with a processor or other logic device through a local bus and isolated from a system bus. Such memory devices are capable of lower power requirements and reduced size due in part to the elimination of certain redundant circuitry. Direct interfacing through the local bus facilitates the elimination or reduction of input/output (I/O) buffer circuitry by eliminating the need to step up to and step down from typical system bus voltage levels. Communication between the memory device and a separate logic device occurs across the local bus at voltage levels compatible with internal logic levels of the memory device.
申请公布号 US2006259647(A1) 申请公布日期 2006.11.16
申请号 US20060487670 申请日期 2006.07.17
申请人 MICRON TECHNOLOGY, INC. 发明人 FAZIO MARIO
分类号 G06F3/00;G06F13/40 主分类号 G06F3/00
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