发明名称 Fully-depleted SOI MOSFET device and process for fabricating the same
摘要 The present invention proposes a nano-scale high-performance SOI MOSFET device and a process for manufacturing the same. The device is characterized by comprising: a metal oxide semiconductor, formed on the SOI substrate; a silicide layer ( 05 ), wherein a gate consists of a single full silicide gate ( 10 ), a high-K dielectric layer ( 08 ) and a part for work function modification ( 09 ); and source/drain ( 6 ) are complete through a silicide reaction and has a modified Schottky junction.
申请公布号 US2006255405(A1) 申请公布日期 2006.11.16
申请号 US20050231624 申请日期 2005.09.21
申请人 NATIONAL CHIAO TUNG UNIVERSITY 发明人 TSUI BING-YUE;LIN CHIA-PIN
分类号 H01L21/8238;H01L21/44;H01L27/12;H01L29/76;H01L29/94 主分类号 H01L21/8238
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