发明名称 SYNCHRONOUS SEMICONDUCTOR MEMORY
摘要 PROBLEM TO BE SOLVED: To provide a synchronous semiconductor memory in which control to an automatic precharge command is facilitated and also a layout area is reduced. SOLUTION: In the synchronous semiconductor memory, a shift circuit (50a) which shifts an automatic precharge command signal (APC) for a prescribed clock cycle period is provided in a plurality of banks in common. Moreover, a bank control circuit (54a, 54b) which inactivates an internal operation activated signal (ACTIVE(A), ACTIVE(B)) to a corresponding bank according to the output signal of the shift circuit, the internal operation activated signal to the corresponding bank, internal access command signals (R(A), R(B), W(A), W(B)) to a bank different to the corresponding bank, and an automatic precharge command signal to the corresponding bank is provided in each bank. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006313622(A) 申请公布日期 2006.11.16
申请号 JP20060186905 申请日期 2006.07.06
申请人 RENESAS TECHNOLOGY CORP 发明人 SAWADA SEIJI
分类号 G11C11/409;G11C11/407 主分类号 G11C11/409
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