发明名称 SEMICONDUCTOR DEVICE AND METHOD FOR EVALUATING EVALUATION PATTERN
摘要 PROBLEM TO BE SOLVED: To raise the precision of structural analysis of evaluation patterns by making a thin filmlike evaluation sample surely contain the evaluation patterns, and moreover thinning the membrane of the evaluation sample. SOLUTION: This semiconductor device 100 is a device wherein a plurality of evaluation patterns 104 are formed in a row on a substrate, from which a filmlike evaluation sample 102 vertical to the substrate is cut off so as to contain each evaluation pattern 104, and is used for observing a cross section of each evaluation pattern 104. The device is configured so that the direction of arrangement of each evaluation pattern 104 deviates from the direction of extending of the evaluation sample 102. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2006313852(A) 申请公布日期 2006.11.16
申请号 JP20050136339 申请日期 2005.05.09
申请人 NEC ELECTRONICS CORP 发明人 SHIRAISHI NOBUHITO
分类号 H01L21/66 主分类号 H01L21/66
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