| 摘要 |
A semiconductor nonvolatile memory cell array includes a plurality of semiconductor nonvolatile memory cells. Each memory cell has a control electrode ( 30 ); a pair of impurity diffusion regions ( 21, 22 ) to provide first and second main electrodes; a pair of variable resistance sections ( 24, 26 ); and a pair of charge storage sections ( 50, 52 ). The array has a word line ( 33 ) electrically connected to the control electrodes of the semiconductor nonvolatile memory cells and bit lines provided perpendicular to the word line and composed of the impurity diffusion regions; and layer insulation layers ( 57, 58 ) provided between the charge storage sections and the word line.
|
