SEMICONDUCTOR INTEGRATED CIRCUIT AND DESIGN METHOD THEREOF

摘要

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit wherein a timing error hardly takes place in flip-flops even in the presence of manufacture tolerance.

SOLUTION: The design method of the semiconductor integrated circuit includes a step S202 of obtaining number of toggle times within a duration time of each clock signal, a step S203 of obtaining delay variations of each clock signal at a lapse of the duration time, a step S204 of obtaining a difference between the delay variations as to clock signals supplied to two storage cells, a step S205 of establishing the obtained difference for timing constraints between the two storage cells as a design margin, and a step S205 of executing timing adjustment of the circuit.

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