发明名称 METHOD FOR VALIDATING AN INTEGRATED CIRCUIT AND RELATED SEMICONDUCTOR PRODUCT THEREOF
摘要 A method for converting an integrated circuit into a test circuit for validating functionality of the integrated circuit is disclosed. The integrated circuit is formed on a wafer, and includes a first inner node and a second inner node, wherein the first and second nodes are not floating. The method includes: providing a wire; and utilizing the wire to electrically connect the first inner node to the second inner node, wherein the wire crosses a scribe line of the wafer.
申请公布号 US2006259836(A1) 申请公布日期 2006.11.16
申请号 US20050908440 申请日期 2005.05.12
申请人 LIU REU-CHIEH 发明人 LIU REU-CHIEH
分类号 G01R31/28 主分类号 G01R31/28
代理机构 代理人
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