摘要 |
A thin film transistor array (400) comprises a substrate (402), a plurality of thin film transistors (410), a plurality of pixel electrodes (420), a plurality of common-used distributed lines (430) and a plurality of auxiliary electrodes (440), wherein the thin film transistors (410), the pixel electrodes (420) and the auxiliary electrodes (440) are respectively disposed in each exposure shot (408) formed on the substrate (402). A first overlapped area exists between drains (418) and gates (412) so as to form parasitic capacitances between the gate (412) and the drain (418). Each auxiliary electrode (440) is disposed under the pixel electrodes (420) and extends over the common-used distributed lines (420) along the direction to its one side. A second overlapped area exists between the auxiliary electrodes (440) and the common-used distributed lines (430) so as to form storage capacitances between each auxiliary electrode (440) and its corresponding common-used distributed line (430). This arrangement compensates for parasitic capacitance deviations caused by missalignment of the gate and drain electrodes. |