| 摘要 |
A parallel test circuit performs a selective test on a specific bank. The bank selectable parallel test circuit comprises a bank selecting control unit and a plurality of bank selecting units. The bank selecting control unit outputs a test mode control signal for selecting a test mode in response to a parallel test signal for controlling a parallel test and a compression test signal for controlling bank selection in the parallel test. Each of the plurality of bank selecting units, which correspond one by one to banks, selectively activates the corresponding banks in response to the test mode control signal and a bank selecting control signal.
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