发明名称 Universal single-ended parallel bus
摘要 A high speed data communication system uses a single-ended bus architecture with a reference signal extracted from a differential periodic signal that is transmitted along with single-ended data. By using a periodic signal such a clock signal with approximately 50% duty cycle, a much more stable and accurate reference signal is established for receiving single-ended data.
申请公布号 US7135889(B2) 申请公布日期 2006.11.14
申请号 US20040856476 申请日期 2004.05.29
申请人 发明人
分类号 H03K19/0175;G06F13/40;H03K19/0185;H04L7/00 主分类号 H03K19/0175
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