发明名称 Systems and methods for mismatch cancellation in switched capacitor circuits
摘要 Various circuits, systems and methods are disclosed for providing double-sampling sigma-delta modulator circuits. For example, circuits are disclosed that include an amplifier with an integrating capacitor, a switched capacitor conversion element that includes a single capacitor bank, and a control element that provides phase signaling that identifies at least two phases. In operation, charge present on the single capacitor bank is transferred to the integrating capacitor and the single capacitor bank is charged during one phase. During the other phase, charge present on the single capacitor bank is transferred to the integrating capacitor, and the single capacitor bank is discharged.
申请公布号 US7136006(B2) 申请公布日期 2006.11.14
申请号 US20050165771 申请日期 2005.06.23
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 KOH JINSEOK;REYES ALEXANDER H.
分类号 H03M1/12 主分类号 H03M1/12
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