发明名称 Method and apparatus for improving reliability in microprocessors
摘要 A method and system provides an increased robustness and protection against the occurrence of soft errors in parallel connect functional redundancy checking processors. This is achieved by predicting in advance the likely occurrence of a soft error and its impact on the resulting instruction flow and using already existing circuit implementations to hide the transient error.
申请公布号 US7137028(B2) 申请公布日期 2006.11.14
申请号 US20040787232 申请日期 2004.02.27
申请人 INTEL CORPORATION 发明人 SMITH RONALD O.
分类号 G06F11/00;G06F11/10;G06F11/14;G06F11/16;H02H3/05;H03K19/003 主分类号 G06F11/00
代理机构 代理人
主权项
地址