发明名称 METHOD AND APPARATUS FOR ACCESSING MULTI LEVEL CELL FLASH MEMORY DEVICE
摘要 An access method and apparatus of a multi level cell flash memory are provided to improve the read speed of a synchronous flash memory using serial sensing, by assembling words of an input/output unit without latching all of one burst unit data. In a flash memory device having memory cells stored with at least 2 bits per cell, a data rearrangement part divides input data of more than two words into a first word and a second word, and stores the first word and the second word in the most significant bits and the least significant bits of the memory cells, respectively, in response to a rearrangement signal. A write driver is controlled for data outputted from the data rearrangement part to be programmed in the memory cells in response to a write enable signal. Multiple sense amplifiers senses the data of the memory cells in response to a sensing enable signal. A latch circuit latches the sensing data of the sense amplifiers in response to a latch control signal. A control part rearranges input data by applying the rearrangement signal, and generates a write enable signal for the rearranged data to be written in the memory cells, and outputs the sensing enable signal to the sense amplifiers to serially sense the most significant bits and the least significant bit of the memory cells during a data read operation, and generates a latch control signal, in order to output the first word when the most significant bits are latched and to output the second word when the least significant bits are latched.
申请公布号 KR100648285(B1) 申请公布日期 2006.11.14
申请号 KR20050055225 申请日期 2005.06.24
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE, JUNG WOO;JEONG, JAE YONG
分类号 G11C16/04 主分类号 G11C16/04
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