DELAY LOCKED LOOP WITH FREQUENCY CONTROL

摘要

Some embodiments of the invention include a delay locked loop having a delay line for delaying an input signal. The input signal is generated from a first signal. A delay controller controls the delay line to adjusting the timing relationship between the first signal and the internal signal. The delay locked loop also includes cycle control circuitry for controlling the cycle time of the signal entering the delay line and the cycle time of the signal exiting the delay line. Other embodiments are described and claimed.