PHASE LOCKED LOOP CIRCUITS, OFFSET PLL TRANSMITTERS, HIGH FREQUENCY INTEGRATED CIRCUITS FOR COMMUNICATION AND RADIO COMMUNICATION SYSTEMS

摘要

PROBLEM TO BE SOLVED: To provide a PLL circuit equipped with a loop gain detecting circuit that can suppress the change of the loop gain.

SOLUTION: When detecting the loop gain, the frequency of an input signal to a second input (IN-2) of a phase detector 101 is first changed, and the response corresponding to the change is detected by the output of a voltage controlled oscillator 102. The detection is performed by connecting the output of the voltage controlled oscillator 102 with a counter 103 and connecting the output of the counter 103 with an integrator 104. The phase locked loop characteristics are optimized by performing feedback for the detection result on the current value of the charge pump 105.

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