发明名称 |
INVERSION BIT LINE, NON-VOLATILE MEMORY TRAPPING CHARGE AND ITS OPERATING METHOD |
摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a non-volatile memory using a memory cell for trapping a charge, and to provide a practical form and an operating method of a memory device based on an inversion bit line. <P>SOLUTION: The memory device traps the charge which is a substitute of implantation to a source and a drain by using an inversion layer caused by an electric field. The memory cell stores two bits. One bit is on the left side of a charge trap structure and the other bit is on the right side. The deletion state of a positive threshold voltage is caused by using a Fowler-Nordheim (FN) tunnel effect of a negative gate voltage. Thus, a charge balance state is established in a positive voltage. A low current source-side hot electron implantation programming method is used. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
申请公布号 |
JP2006310720(A) |
申请公布日期 |
2006.11.09 |
申请号 |
JP20050194512 |
申请日期 |
2005.07.04 |
申请人 |
MACRONIX INTERNATL CO LTD |
发明人 |
LUNG HSIANG-LAN |
分类号 |
H01L21/8247;G11C16/02;G11C16/04;H01L27/115;H01L29/788;H01L29/792 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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