发明名称 Non-Volatile Semiconductor Memory Device
摘要 A non-volatile semiconductor memory device according to the present invention has a semiconductor substrate and a memory cell having a floating gate provided through a tunnel insulating layer on the semiconductor substrate, and a control gate provided through an inter-layer insulting layer on said floating gate. The inter-insulating layer includes a silicon oxide layer contiguous to said floating gate, a first silicon nitride layer provided by a CVD method on the silicon oxide layer and a second silicon nitride layer provided on said first silicon nitride layer and having a lower trap density than that of the first silicon nitride layer. The inter-insulating layer may includes a silicon oxide layer contiguous to said floating gate and a silicon oxide layer deposited on said silicon oxide layer and having a quantity of hydrogen content on the order of 10<SUP>19</SUP>/cm<SUP>3 </SUP>or less. The inter-insulating layer also may includes a silicon oxide layer serving as a layer contiguous to at least one of the floating gate and the control gate, and having a lower trap density than that of a silicon nitride layer formed by a CVD method.
申请公布号 US2006249781(A1) 申请公布日期 2006.11.09
申请号 US20060458324 申请日期 2006.07.18
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 MORI SEIICHI
分类号 H01L21/8247;H01L29/788;H01L21/28;H01L27/115;H01L29/51;H01L29/792 主分类号 H01L21/8247
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