| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor storage device having low current consumption and a small chip layout area. <P>SOLUTION: In nonvolatile memory cells (MC; MCO, MCI), a selection transistor (ST) is connected to a memory cell transistor (MT) in series. The selection transistor has a two-layer gate structure, and drives voltages of respective gates (G1, G2) individually. The gate potential of the selection transistor is set to a predetermined level using capacitance coupling between stacked gate electrode layers of the selection transistor. An absolute value of the level of voltage generated by a selection transistor gate voltage generation part can be made small, the current consumption can be reduced, and a layout area of the voltage generation part can be reduced. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
