发明名称 DYNAMIC 12C SLAVE DEVICE ADDRESS DECODER
摘要 <p>Consistent with one example embodiment, a communications system uses an I2C serial data transfer bus that has a serial data line (110) and a clock line (120) used to implement a communications protocol. The communications system includes a slave device having address pins (400), each coupled to the serial data line, clock line, power line, or ground. Communications circuitry communicates with a master device in accordance with the communications protocol over the data transfer bus. Decoding circuitry detects a first state of the address pins (410), detects a second state of the address pins (420) subsequent to the detection of the first state, wherein one or more logic values of the address pins differ between the first state and the second state, and decodes a slave device address (430) as a functional relationship between the first state and the second state of the address pins.</p>
申请公布号 WO2006117753(A1) 申请公布日期 2006.11.09
申请号 WO2006IB51366 申请日期 2006.05.01
申请人 KONINKLIJKE PHILIPS ELECTRONICS, N.V.;DESHPANDE, AMRITA;ANDERSON, ALMA;IRAZABAL, JEAN-MARC 发明人 DESHPANDE, AMRITA;ANDERSON, ALMA;IRAZABAL, JEAN-MARC
分类号 G06F13/42;G06F12/06;G06F13/40 主分类号 G06F13/42
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