发明名称 Computer for dynamically determining interrupt delay
摘要 <p>In a computer having a unit for outputting an interrupt request to a processor, a delay condition from occurrence of an interrupt event to issue of an interrupt request to the processor can be dynamically determined depending on the processor load status, etc. The interrupt request output unit (1) includes a unit (4) for obtaining a determination factor of a delay condition from the occurrence of an interrupt event to the issue of an interrupt request to the processor (2), and a unit (3) for determining a delay condition corresponding to the obtained determination factor. For example, a time up to a read of an interrupt factor by the processor is obtained as a determination factor, and is multiplied by a coefficient, thereby determining a delay time as a delay condition. </p>
申请公布号 EP1713004(A3) 申请公布日期 2006.11.08
申请号 EP20060014559 申请日期 2002.01.24
申请人 FUJITSU LTD. 发明人 JINZAKI, AKIRA
分类号 G06F9/46;G06F13/24 主分类号 G06F9/46
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