| 摘要 |
A D-flipflop circuit of high speed and low consumption power is provided to improve an operational speed of a pre-scaler by improving an operational speed of a D-flipflop. A switching unit(310) is switched by +clock or -clock. +D- signal and -D- signal are applied to an input unit(320). The +D- signal and -D- signal of the input unit(320) are outputted according to switching of the switching unit(310). A load unit(330) is an impedance of the switching unit(310) and the output unit(340). A first transistor has first to third terminals. A current source is connected to the third terminal of the first transistor. A power voltage is applied to the second terminal. The first and third terminals are connected to each other and biases the load unit(330). |
